yaze 0.2.2
Link to the Past ROM Editor
 
Loading...
Searching...
No Matches
cpu.h
Go to the documentation of this file.
1#ifndef YAZE_APP_EMU_CPU_H_
2#define YAZE_APP_EMU_CPU_H_
3
4#include <algorithm>
5#include <cstdint>
6#include <vector>
7
9
10namespace yaze {
11namespace emu {
12
14 public:
15 // Constructor
16 InstructionEntry(uint32_t addr, uint8_t op, const std::string& ops,
17 const std::string& instr)
18 : address(addr), opcode(op), operands(ops), instruction(instr) {}
19
20 // Getters for the class members
21 uint32_t GetAddress() const { return address; }
22 uint8_t GetOpcode() const { return opcode; }
23 const std::string& GetOperands() const { return operands; }
24 const std::string& GetInstruction() const { return instruction; }
25
26 uint32_t address; // Memory address of the instruction
27 uint8_t opcode; // Opcode of the instruction
28 std::string operands; // Operand(s) of the instruction, if any
29 std::string instruction; // Human-readable instruction text
30};
31
32class Cpu {
33 public:
34 explicit Cpu(Memory& mem, CpuCallbacks& callbacks)
35 : memory(mem), callbacks_(callbacks) {}
36 void Reset(bool hard = false);
37
38 void RunOpcode();
39
40 void ExecuteInstruction(uint8_t opcode);
41 void LogInstructions(uint16_t PC, uint8_t opcode, uint16_t operand,
42 bool immediate, bool accumulator_mode);
43
44 void SetIrq(bool state) { irq_wanted_ = state; }
45 void Nmi() { nmi_wanted_ = true; }
46
47 std::vector<uint32_t> breakpoints_;
48 std::vector<InstructionEntry> instruction_log_;
49
50 // ======================================================
51 // Interrupt Vectors
52 // Emulation mode, e = 1 Native mode, e = 0
53 //
54 // 0xFFFE,FF - IRQ/BRK 0xFFEE,EF - IRQ
55 // 0xFFFC,FD - RESET
56 // 0xFFFA,FB - NMI 0xFFEA,EB - NMI
57 // 0xFFF8,F9 - ABORT 0xFFE8,E9 - ABORT
58 // 0xFFE6,E7 - BRK
59 // 0xFFF4,F5 - COP 0xFFE4,E5 - COP
60 void DoInterrupt();
61
62 // ======================================================
63 // Registers
64
65 uint16_t A = 0; // Accumulator
66 uint16_t X = 0; // X index register
67 uint16_t Y = 0; // Y index register
68 uint16_t D = 0; // Direct Page register
69 uint8_t DB = 0; // Data Bank register
70 uint8_t PB = 0; // Program Bank register
71 uint16_t PC = 0; // Program Counter
72 uint8_t E = 1; // Emulation mode flag
73 uint8_t status = 0b00110000; // Processor Status (P)
74
75 // Mnemonic Value Binary Description
76 // N #$80 10000000 Negative
77 // V #$40 01000000 Overflow
78 // M #$20 00100000 Accumulator size (0 = 16-bit, 1 = 8-bit)
79 // X #$10 00010000 Index size (0 = 16-bit, 1 = 8-bit)
80 // D #$08 00001000 Decimal
81 // I #$04 00000100 IRQ disable
82 // Z #$02 00000010 Zero
83 // C #$01 00000001 Carry
84 // E 6502 emulation mode
85 // B #$10 00010000 Break (emulation mode only)
86
87 void SetFlags(uint8_t val) {
88 status = val;
89 if (E) {
91 SetIndexSize(true);
92 SetSP(SP() & 0xFF | 0x100);
93 }
94 if (GetIndexSize()) {
95 X &= 0xff;
96 Y &= 0xff;
97 }
98 }
99
100 void SetZN(uint16_t value, bool byte) {
101 if (byte) {
102 SetZeroFlag((value & 0xff) == 0);
103 SetNegativeFlag(value & 0x80);
104 } else {
105 SetZeroFlag(value == 0);
106 SetNegativeFlag(value & 0x8000);
107 }
108 }
109
110 // Setting flags in the status register
111 bool m() { return GetAccumulatorSize() ? 1 : 0; }
112 bool xf() { return GetIndexSize() ? 1 : 0; }
113 int GetAccumulatorSize() const { return status & 0x20; }
114 int GetIndexSize() const { return status & 0x10; }
115 void SetAccumulatorSize(bool set) { SetFlag(0x20, set); }
116 void SetIndexSize(bool set) { SetFlag(0x10, set); }
117
118 // Set individual flags
119 void SetNegativeFlag(bool set) { SetFlag(0x80, set); }
120 void SetOverflowFlag(bool set) { SetFlag(0x40, set); }
121 void SetBreakFlag(bool set) { SetFlag(0x10, set); }
122 void SetDecimalFlag(bool set) { SetFlag(0x08, set); }
123 void SetInterruptFlag(bool set) { SetFlag(0x04, set); }
124 void SetZeroFlag(bool set) { SetFlag(0x02, set); }
125 void SetCarryFlag(bool set) { SetFlag(0x01, set); }
126
127 // Get individual flags
128 bool GetNegativeFlag() const { return GetFlag(0x80); }
129 bool GetOverflowFlag() const { return GetFlag(0x40); }
130 bool GetBreakFlag() const { return GetFlag(0x10); }
131 bool GetDecimalFlag() const { return GetFlag(0x08); }
132 bool GetInterruptFlag() const { return GetFlag(0x04); }
133 bool GetZeroFlag() const { return GetFlag(0x02); }
134 bool GetCarryFlag() const { return GetFlag(0x01); }
135
136 enum class AccessType { Control, Data };
137
138 uint8_t ReadOpcode() { return ReadByte((PB << 16) | PC++); }
139
140 uint16_t ReadOpcodeWord(bool int_check = false) {
141 uint8_t value = ReadOpcode();
142 if (int_check) CheckInt();
143 return value | (ReadOpcode() << 8);
144 }
145
146 // Memory access routines
147 uint8_t ReadByte(uint32_t address) { return callbacks_.read_byte(address); }
148 uint16_t ReadWord(uint32_t address, uint32_t address_high,
149 bool int_check = false) {
150 uint8_t value = ReadByte(address);
151 if (int_check) CheckInt();
152 uint8_t value2 = ReadByte(address_high);
153 return value | (value2 << 8);
154 }
155 uint32_t ReadWordLong(uint32_t address) {
156 uint8_t value = ReadByte(address);
157 uint8_t value2 = ReadByte(address + 1);
158 uint8_t value3 = ReadByte(address + 2);
159 return value | (value2 << 8) | (value3 << 16);
160 }
161
162 void WriteByte(uint32_t address, uint8_t value) {
163 callbacks_.write_byte(address, value);
164 }
165
166 void WriteWord(uint32_t address, uint32_t address_high, uint16_t value,
167 bool reversed = false, bool int_check = false) {
168 if (reversed) {
169 callbacks_.write_byte(address_high, value >> 8);
170 if (int_check) CheckInt();
171 callbacks_.write_byte(address, value & 0xFF);
172 } else {
173 callbacks_.write_byte(address, value & 0xFF);
174 if (int_check) CheckInt();
175 callbacks_.write_byte(address_high, value >> 8);
176 }
177 }
178 void WriteLong(uint32_t address, uint32_t value) {
179 callbacks_.write_byte(address, value & 0xFF);
180 callbacks_.write_byte(address + 1, (value >> 8) & 0xFF);
181 callbacks_.write_byte(address + 2, value >> 16);
182 }
183
184 void PushByte(uint8_t value) {
185 callbacks_.write_byte(SP(), value);
186 SetSP(SP() - 1);
187 if (E) SetSP((SP() & 0xff) | 0x100);
188 }
189 void PushWord(uint16_t value, bool int_check = false) {
190 PushByte(value >> 8);
191 if (int_check) CheckInt();
192 PushByte(value & 0xFF);
193 }
194 void PushLong(uint32_t value) { // Push 24-bit value
195 PushByte(value >> 16);
196 PushWord(value & 0xFFFF);
197 }
198
199 uint8_t PopByte() {
200 SetSP(SP() + 1);
201 if (E) SetSP((SP() & 0xff) | 0x100);
202 return ReadByte(SP());
203 }
204 uint16_t PopWord(bool int_check = false) {
205 uint8_t low = PopByte();
206 if (int_check) CheckInt();
207 return low | (PopByte() << 8);
208 }
209 uint32_t PopLong() { // Pop 24-bit value
210 uint32_t low = PopWord();
211 uint32_t high = PopByte();
212 return (high << 16) | low;
213 }
214
215 void DoBranch(bool check) {
216 if (!check) CheckInt();
217 uint8_t value = ReadOpcode();
218 if (check) {
219 CheckInt();
220 callbacks_.idle(false); // taken branch: 1 extra cycle
221 PC += (int8_t)value;
222 }
223 }
224
225 void set_int_delay(bool delay) { int_delay_ = delay; }
226
227 // Addressing Modes
228
229 // Effective Address:
230 // Bank: Data Bank Register if locating data
231 // Program Bank Register if transferring control
232 // High: Second operand byte
233 // Low: First operand byte
234 //
235 // LDA addr
236 uint32_t Absolute(uint32_t* low);
237
238 // Effective Address:
239 // The Data Bank Register is concatened with the 16-bit operand
240 // the 24-bit result is added to the X Index Register
241 // based on the emulation mode (16:X=0, 8:X=1)
242 //
243 // LDA addr, X
245 uint32_t AdrAbx(uint32_t* low, bool write);
246
247 // Effective Address:
248 // The Data Bank Register is concatened with the 16-bit operand
249 // the 24-bit result is added to the Y Index Register
250 // based on the emulation mode (16:Y=0, 8:Y=1)
251 //
252 // LDA addr, Y
254 uint32_t AdrAby(uint32_t* low, bool write);
255
256 void AdrImp();
257 uint32_t AdrIdx(uint32_t* low);
258
259 uint32_t AdrIdp(uint32_t* low);
260 uint32_t AdrIdy(uint32_t* low, bool write);
261 uint32_t AdrIdl(uint32_t* low);
262 uint32_t AdrIly(uint32_t* low);
263 uint32_t AdrIsy(uint32_t* low);
264 uint32_t Immediate(uint32_t* low, bool xFlag);
265
266 // Effective Address:
267 // Bank: Program Bank Register (PBR)
268 // High/low: The Indirect Address
269 // Indirect Address: Located in the Program Bank at the sum of
270 // the operand double byte and X based on the
271 // emulation mode
272 // JMP (addr, X)
274
275 // Effective Address:
276 // Bank: Program Bank Register (PBR)
277 // High/low: The Indirect Address
278 // Indirect Address: Located in Bank Zero, at the operand double byte
279 //
280 // JMP (addr)
282
283 // Effective Address:
284 // Bank/High/Low: The 24-bit Indirect Address
285 // Indirect Address: Located in Bank Zero, at the operand double byte
286 //
287 // JMP [addr]
289
290 // Effective Address:
291 // Bank: Third operand byte
292 // High: Second operand byte
293 // Low: First operand byte
294 //
295 // LDA long
296 uint32_t AbsoluteLong();
297 uint32_t AdrAbl(uint32_t* low);
298
299 // Effective Address:
300 // The 24-bit operand is added to X based on the emulation mode
301 //
302 // LDA long, X
304 uint32_t AdrAlx(uint32_t* low);
305
306 // Source Effective Address:
307 // Bank: Second operand byte
308 // High/Low: The 16-bit value in X, if X is 8-bit high byte is 0
309 //
310 // Destination Effective Address:
311 // Bank: First operand byte
312 // High/Low: The 16-bit value in Y, if Y is 8-bit high byte is 0
313 //
314 // Length:
315 // The number of bytes to be moved: 16-bit value in Acculumator C plus 1.
316 //
317 // MVN src, dst
318 void BlockMove(uint16_t source, uint16_t dest, uint16_t length);
319
320 // Effective Address:
321 // Bank: Zero
322 // High/low: Direct Page Register plus operand byte
323 //
324 // LDA dp
325 uint16_t DirectPage();
326 uint32_t AdrDp(uint32_t* low);
327
328 // Effective Address:
329 // Bank: Zero
330 // High/low: Direct Page Register plus operand byte plus X
331 // based on the emulation mode
332 //
333 // LDA dp, X
334 uint16_t DirectPageIndexedX();
335 uint32_t AdrDpx(uint32_t* low);
336
337 // Effective Address:
338 // Bank: Zero
339 // High/low: Direct Page Register plus operand byte plus Y
340 // based on the emulation mode
341 // LDA dp, Y
342 uint16_t DirectPageIndexedY();
343 uint32_t AdrDpy(uint32_t* low);
344
345 // Effective Address:
346 // Bank: Data bank register
347 // High/low: The indirect address
348 // Indirect Address: Located in the direct page at the sum of the direct page
349 // register, the operand byte, and X based on the emulation mode in bank zero.
350 //
351 // LDA (dp, X)
353
354 // Effective Address:
355 // Bank: Data bank register
356 // High/low: The 16-bit indirect address
357 // Indirect Address: The operand byte plus the direct page register in bank
358 // zero.
359 //
360 // LDA (dp)
362
363 // Effective Address:
364 // Bank/High/Low: The 24-bit indirect address
365 // Indirect address: The operand byte plus the direct page
366 // register in bank zero.
367 //
368 // LDA [dp]
369 uint32_t DirectPageIndirectLong();
370
371 // Effective Address:
372 // Found by concatenating the data bank to the double-byte
373 // indirect address, then adding Y based on the emulation mode.
374 //
375 // Indirect Address: Located in the Direct Page at the sum of the direct page
376 // register and the operand byte, in bank zero.
377 //
378 // LDA (dp), Y
380
381 // Effective Address:
382 // Found by adding to the triple-byte indirect address Y based on the
383 // emulation mode. Indrect Address: Located in the Direct Page at the sum
384 // of the direct page register and the operand byte in bank zero.
385 // Indirect Address:
386 // Located in the Direct Page at the sum of the direct page register and
387 // the operand byte in bank zero.
388 //
389 // LDA (dp), Y
391
392 // 8-bit data: Data Operand Byte
393 // 16-bit data 65816 native mode m or x = 0
394 // Data High: Second Operand Byte
395 // Data Low: First Operand Byte
396 //
397 // LDA #const
398 uint16_t Immediate(bool index_size = false);
399
400 uint16_t StackRelative();
401 uint32_t AdrSr(uint32_t* low);
402
403 // Effective Address:
404 // The Data Bank Register is concatenated to the Indirect Address;
405 // the 24-bit result is added to Y (16 bits if x = 0; else 8 bits)
406 // Indirect Address:
407 // Located at the 16-bit sum of the 8-bit operand and the 16-bit stack
408 // pointer
409 //
410 // LDA (sr, S), Y
412
413 // ======================================================
414 // Instructions
415
416 // ADC: Add with carry
417 void ADC(uint16_t operand);
418
419 // AND: Logical AND
420 void AND(uint32_t address, bool immediate = false);
421 void ANDAbsoluteLong(uint32_t address);
422
423 // ASL: Arithmetic shift left
424 void ASL(uint16_t address);
425
426 // BCC: Branch if carry clear
427 void BCC(int8_t offset);
428
429 // BCS: Branch if carry set
430 void BCS(int8_t offset);
431
432 // BEQ: Branch if equal
433 void BEQ(int8_t offset);
434
435 // BIT: Bit test
436 void BIT(uint16_t address);
437
438 // BMI: Branch if minus
439 void BMI(int8_t offset);
440
441 // BNE: Branch if not equal
442 void BNE(int8_t offset);
443
444 // BPL: Branch if plus
445 void BPL(int8_t offset);
446
447 // BRA: Branch always
448 void BRA(int8_t offset);
449
450 // BRK: Force interrupt
451 void BRK();
452
453 // BRL: Branch always long
454 void BRL(int16_t offset);
455
456 // BVC: Branch if overflow clear
457 void BVC(int8_t offset);
458
459 // BVS: Branch if overflow set
460 void BVS(int8_t offset);
461
462 // CLC: Clear carry flag
463 void CLC();
464
465 // CLD: Clear decimal mode
466 void CLD();
467
468 // CLI: Clear interrupt disable bit
469 void CLI();
470
471 // CLV: Clear overflow flag
472 void CLV();
473
474 // CMP: Compare
475 void CMP(uint32_t address, bool immediate = false);
476
477 // COP: Coprocessor enable
478 void COP();
479
480 // CPX: Compare X register
481 void CPX(uint32_t address, bool immediate = false);
482
483 // CPY: Compare Y register
484 void CPY(uint32_t address, bool immediate = false);
485
486 // DEC: Decrement memory
487 void DEC(uint32_t address, bool accumulator = false);
488
489 // DEX: Decrement X register
490 void DEX();
491
492 // DEY: Decrement Y register
493 void DEY();
494
495 // EOR: Exclusive OR
496 void EOR(uint32_t address, bool immediate = false);
497
498 // INC: Increment memory
499 void INC(uint32_t address, bool accumulator = false);
500
501 // INX: Increment X register
502 void INX();
503
504 // INY: Increment Y register
505 void INY();
506
507 // JMP: Jump
508 void JMP(uint16_t address);
509
510 // JML: Jump long
511 void JML(uint16_t address);
512
513 // JSR: Jump to subroutine
514 void JSR(uint16_t address);
515
516 // JSL: Jump to subroutine long
517 void JSL(uint16_t address);
518
519 // LDA: Load accumulator
520 void LDA(uint16_t address, bool immediate = false, bool direct_page = false,
521 bool data_bank = false);
522
523 // LDX: Load X register
524 void LDX(uint16_t address, bool immediate = false);
525
526 // LDY: Load Y register
527 void LDY(uint16_t address, bool immediate = false);
528
529 // LSR: Logical shift right
530 void LSR(uint16_t address, bool accumulator = false);
531
532 // MVN: Block move next
533 void MVN();
534
535 // MVP: Block move previous
536 void MVP();
537
538 // NOP: No operation
539 void NOP();
540
541 // ORA: Logical inclusive OR
542 void ORA(uint32_t low, uint32_t high);
543
544 // PEA: Push effective absolute address
545 void PEA();
546
547 // PEI: Push effective indirect address
548 void PEI();
549
550 // PER: Push effective relative address
551 void PER();
552
553 // PHA: Push accumulator
554 void PHA();
555
556 // PHB: Push data bank register
557 void PHB();
558
559 // PHD: Push direct page register
560 void PHD();
561
562 // PHK: Push program bank register
563 void PHK();
564
565 // PHP: Push processor status (flags)
566 void PHP();
567
568 // PHX: Push X register
569 void PHX();
570
571 // PHY: Push Y register
572 void PHY();
573
574 // PLA: Pull accumulator
575 void PLA();
576
577 // PLB: Pull data bank register
578 void PLB();
579
580 // PLD: Pull direct page register
581 void PLD();
582
583 // PLP: Pull processor status (flags)
584 void PLP();
585
586 // PLX: Pull X register
587 void PLX();
588
589 // PLY: Pull Y register
590 void PLY();
591
592 // REP: Reset processor status bits
593 void REP();
594
595 // ROL: Rotate left
596 void ROL(uint32_t address, bool accumulator = false);
597
598 // ROR: Rotate right
599 void ROR(uint32_t address, bool accumulator = false);
600
601 // RTI: Return from interrupt
602 void RTI();
603
604 // RTL: Return from subroutine long
605 void RTL();
606
607 // RTS: Return from subroutine
608 void RTS();
609
610 // SBC: Subtract with carry
611 void SBC(uint32_t operand, bool immediate = false);
612
613 // SEC: Set carry flag
614 void SEC();
615
616 // SED: Set decimal mode
617 void SED();
618
619 // SEI: Set interrupt disable status
620 void SEI();
621
622 // SEP: Set processor status bits
623 void SEP();
624
625 // STA: Store accumulator
626 void STA(uint32_t address);
627
628 // STP: Stop the processor
629 void STP();
630
631 // STX: Store X register
632 void STX(uint16_t address);
633
634 // STY: Store Y register
635 void STY(uint16_t address);
636
637 // STZ: Store zero
638 void STZ(uint16_t address);
639
640 // TAX: Transfer accumulator to X
641 void TAX();
642
643 // TAY: Transfer accumulator to Y
644 void TAY();
645
646 // TCD: Transfer 16-bit accumulator to direct page register
647 void TCD();
648
649 // TCS: Transfer 16-bit accumulator to stack pointer
650 void TCS();
651
652 // TDC: Transfer direct page register to 16-bit accumulator
653 void TDC();
654
655 // TRB: Test and reset bits
656 void TRB(uint16_t address);
657
658 // TSB: Test and set bits
659 void TSB(uint16_t address);
660
661 // TSC: Transfer stack pointer to 16-bit accumulator
662 void TSC();
663
664 // TSX: Transfer stack pointer to X
665 void TSX();
666
667 // TXA: Transfer X to accumulator
668 void TXA();
669
670 // TXS: Transfer X to stack pointer
671 void TXS();
672
673 // TXY: Transfer X to Y
674 void TXY();
675
676 // TYA: Transfer Y to accumulator
677 void TYA();
678
679 // TYX: Transfer Y to X
680 void TYX();
681
682 // WAI: Wait for interrupt
683 void WAI();
684
685 // WDM: Reserved for future expansion
686 void WDM();
687
688 // XBA: Exchange B and A
689 void XBA();
690
691 // XCE: Exchange carry and emulation bits
692 void XCE();
693
694 void And(uint32_t low, uint32_t high);
695 void Eor(uint32_t low, uint32_t high);
696 void Adc(uint32_t low, uint32_t high);
697 void Sbc(uint32_t low, uint32_t high);
698 void Cmp(uint32_t low, uint32_t high);
699 void Cpx(uint32_t low, uint32_t high);
700 void Cpy(uint32_t low, uint32_t high);
701 void Bit(uint32_t low, uint32_t high);
702 void Lda(uint32_t low, uint32_t high);
703 void Ldx(uint32_t low, uint32_t high);
704 void Ldy(uint32_t low, uint32_t high);
705 void Sta(uint32_t low, uint32_t high);
706 void Stx(uint32_t low, uint32_t high);
707 void Sty(uint32_t low, uint32_t high);
708 void Stz(uint32_t low, uint32_t high);
709 void Ror(uint32_t low, uint32_t high);
710 void Rol(uint32_t low, uint32_t high);
711 void Lsr(uint32_t low, uint32_t high);
712 void Asl(uint32_t low, uint32_t high);
713 void Inc(uint32_t low, uint32_t high);
714 void Dec(uint32_t low, uint32_t high);
715 void Tsb(uint32_t low, uint32_t high);
716 void Trb(uint32_t low, uint32_t high);
717
718 uint16_t SP() const { return memory.SP(); }
719 void SetSP(uint16_t value) { memory.SetSP(value); }
720
721 bool IsBreakpoint(uint32_t address) {
722 return std::find(breakpoints_.begin(), breakpoints_.end(), address) !=
723 breakpoints_.end();
724 }
725 void SetBreakpoint(uint32_t address) { breakpoints_.push_back(address); }
726 void ClearBreakpoint(uint32_t address) {
727 breakpoints_.erase(
728 std::remove(breakpoints_.begin(), breakpoints_.end(), address),
729 breakpoints_.end());
730 }
732 breakpoints_.clear();
733 breakpoints_.shrink_to_fit();
734 }
735 auto GetBreakpoints() { return breakpoints_; }
736
737 void CheckInt() {
740 int_delay_ = false;
741 }
742
743 auto mutable_log_instructions() -> bool* { return &log_instructions_; }
744
745 private:
746 void compare(uint16_t register_value, uint16_t memory_value) {
747 uint16_t result;
748 if (GetIndexSize()) {
749 // 8-bit mode
750 uint8_t result8 = static_cast<uint8_t>(register_value) -
751 static_cast<uint8_t>(memory_value);
752 result = result8;
753 SetNegativeFlag(result & 0x80); // Negative flag for 8-bit
754 } else {
755 // 16-bit mode
756 result = register_value - memory_value;
757 SetNegativeFlag(result & 0x8000); // Negative flag for 16-bit
758 }
759 SetZeroFlag(result == 0); // Zero flag
760 SetCarryFlag(register_value >= memory_value); // Carry flag
761 }
762
763 void SetFlag(uint8_t mask, bool set) {
764 if (set) {
765 status |= mask; // Set the bit
766 } else {
767 status &= ~mask; // Clear the bit
768 }
769 }
770
771 bool GetFlag(uint8_t mask) const { return (status & mask) != 0; }
772
773 bool log_instructions_ = false;
774
775 bool waiting_ = false;
776 bool stopped_ = false;
777
778 bool irq_wanted_ = false;
779 bool nmi_wanted_ = false;
780 bool reset_wanted_ = false;
781 bool int_wanted_ = false;
782 bool int_delay_ = false;
783
786};
787
788} // namespace emu
789} // namespace yaze
790
791#endif // YAZE_APP_EMU_CPU_H_
uint16_t SP() const
Definition cpu.h:718
uint16_t D
Definition cpu.h:68
void Stx(uint32_t low, uint32_t high)
uint8_t status
Definition cpu.h:73
void BRA(int8_t offset)
bool GetNegativeFlag() const
Definition cpu.h:128
uint32_t AdrAby(uint32_t *low, bool write)
void WriteWord(uint32_t address, uint32_t address_high, uint16_t value, bool reversed=false, bool int_check=false)
Definition cpu.h:166
uint16_t DirectPage()
void JML(uint16_t address)
uint32_t DirectPageIndirectLongIndexedY()
void BVC(int8_t offset)
bool GetInterruptFlag() const
Definition cpu.h:132
uint32_t AdrAbl(uint32_t *low)
void JSR(uint16_t address)
void Asl(uint32_t low, uint32_t high)
void STA(uint32_t address)
uint32_t AdrIdy(uint32_t *low, bool write)
Definition addressing.cc:52
void Inc(uint32_t low, uint32_t high)
bool stopped_
Definition cpu.h:776
uint16_t DirectPageIndirectIndexedY()
uint8_t DB
Definition cpu.h:69
void SBC(uint32_t operand, bool immediate=false)
uint32_t AdrSr(uint32_t *low)
Definition addressing.cc:81
void SetZN(uint16_t value, bool byte)
Definition cpu.h:100
void Ldy(uint32_t low, uint32_t high)
uint32_t Immediate(uint32_t *low, bool xFlag)
Definition addressing.cc:18
void LSR(uint16_t address, bool accumulator=false)
uint16_t X
Definition cpu.h:66
uint16_t DirectPageIndexedY()
uint16_t AbsoluteIndexedIndirect()
void Sta(uint32_t low, uint32_t high)
uint8_t ReadByte(uint32_t address)
Definition cpu.h:147
uint32_t AdrIdl(uint32_t *low)
Definition addressing.cc:63
void SetIrq(bool state)
Definition cpu.h:44
void BlockMove(uint16_t source, uint16_t dest, uint16_t length)
uint32_t AbsoluteLongIndexedX()
uint32_t DirectPageIndirectLong()
bool GetFlag(uint8_t mask) const
Definition cpu.h:771
void Cpy(uint32_t low, uint32_t high)
uint16_t ReadWord(uint32_t address, uint32_t address_high, bool int_check=false)
Definition cpu.h:148
void SetDecimalFlag(bool set)
Definition cpu.h:122
uint16_t Y
Definition cpu.h:67
void Nmi()
Definition cpu.h:45
uint8_t ReadOpcode()
Definition cpu.h:138
bool GetZeroFlag() const
Definition cpu.h:133
uint32_t AdrAbx(uint32_t *low, bool write)
bool log_instructions_
Definition cpu.h:773
void STY(uint16_t address)
void CheckInt()
Definition cpu.h:737
void CPX(uint32_t address, bool immediate=false)
uint32_t AdrDp(uint32_t *low)
void Bit(uint32_t low, uint32_t high)
void set_int_delay(bool delay)
Definition cpu.h:225
uint32_t PopLong()
Definition cpu.h:209
bool waiting_
Definition cpu.h:775
std::vector< InstructionEntry > instruction_log_
Definition cpu.h:48
int GetIndexSize() const
Definition cpu.h:114
Memory & memory
Definition cpu.h:785
void And(uint32_t low, uint32_t high)
void SetZeroFlag(bool set)
Definition cpu.h:124
void WriteByte(uint32_t address, uint8_t value)
Definition cpu.h:162
bool reset_wanted_
Definition cpu.h:780
void INC(uint32_t address, bool accumulator=false)
void BCC(int8_t offset)
uint16_t PC
Definition cpu.h:71
void ORA(uint32_t low, uint32_t high)
void BNE(int8_t offset)
uint16_t A
Definition cpu.h:65
uint32_t AdrIdp(uint32_t *low)
Definition addressing.cc:44
void Sbc(uint32_t low, uint32_t high)
void CMP(uint32_t address, bool immediate=false)
Cpu(Memory &mem, CpuCallbacks &callbacks)
Definition cpu.h:34
void Trb(uint32_t low, uint32_t high)
void Lda(uint32_t low, uint32_t high)
void Cpx(uint32_t low, uint32_t high)
void EOR(uint32_t address, bool immediate=false)
void Rol(uint32_t low, uint32_t high)
uint32_t AdrDpy(uint32_t *low)
Definition addressing.cc:36
void ASL(uint16_t address)
uint8_t PB
Definition cpu.h:70
void Tsb(uint32_t low, uint32_t high)
void BMI(int8_t offset)
void Dec(uint32_t low, uint32_t high)
void SetAccumulatorSize(bool set)
Definition cpu.h:115
void TRB(uint16_t address)
void SetFlag(uint8_t mask, bool set)
Definition cpu.h:763
void SetFlags(uint8_t val)
Definition cpu.h:87
auto mutable_log_instructions() -> bool *
Definition cpu.h:743
void DoInterrupt()
Definition cpu.cc:87
void TSB(uint16_t address)
auto GetBreakpoints()
Definition cpu.h:735
void Ldx(uint32_t low, uint32_t high)
uint16_t DirectPageIndexedX()
uint16_t Immediate(bool index_size=false)
void ADC(uint16_t operand)
void BRL(int16_t offset)
uint32_t AbsoluteIndexedY()
void ROL(uint32_t address, bool accumulator=false)
void PushByte(uint8_t value)
Definition cpu.h:184
uint32_t AbsoluteLong()
void PushWord(uint16_t value, bool int_check=false)
Definition cpu.h:189
int GetAccumulatorSize() const
Definition cpu.h:113
void AND(uint32_t address, bool immediate=false)
uint32_t AdrIly(uint32_t *low)
Definition addressing.cc:72
void STX(uint16_t address)
void ROR(uint32_t address, bool accumulator=false)
void LogInstructions(uint16_t PC, uint8_t opcode, uint16_t operand, bool immediate, bool accumulator_mode)
Definition cpu.cc:1802
void SetOverflowFlag(bool set)
Definition cpu.h:120
void ExecuteInstruction(uint8_t opcode)
Definition cpu.cc:104
uint16_t DirectPageIndexedIndirectX()
uint32_t ReadWordLong(uint32_t address)
Definition cpu.h:155
uint32_t AdrIdx(uint32_t *low)
void BEQ(int8_t offset)
uint32_t Absolute(uint32_t *low)
Definition addressing.cc:97
uint32_t AdrAlx(uint32_t *low)
void Reset(bool hard=false)
Definition cpu.cc:15
uint16_t PopWord(bool int_check=false)
Definition cpu.h:204
void ClearBreakpoint(uint32_t address)
Definition cpu.h:726
void STZ(uint16_t address)
uint16_t DirectPageIndirect()
void BCS(int8_t offset)
void SetCarryFlag(bool set)
Definition cpu.h:125
void SetInterruptFlag(bool set)
Definition cpu.h:123
bool GetCarryFlag() const
Definition cpu.h:134
void SetBreakpoint(uint32_t address)
Definition cpu.h:725
bool IsBreakpoint(uint32_t address)
Definition cpu.h:721
bool m()
Definition cpu.h:111
bool irq_wanted_
Definition cpu.h:778
void RunOpcode()
Definition cpu.cc:37
CpuCallbacks callbacks_
Definition cpu.h:784
void CPY(uint32_t address, bool immediate=false)
void DoBranch(bool check)
Definition cpu.h:215
void Eor(uint32_t low, uint32_t high)
void SetSP(uint16_t value)
Definition cpu.h:719
uint32_t AdrIsy(uint32_t *low)
Definition addressing.cc:88
void ANDAbsoluteLong(uint32_t address)
void DEC(uint32_t address, bool accumulator=false)
void BVS(int8_t offset)
bool int_delay_
Definition cpu.h:782
void PushLong(uint32_t value)
Definition cpu.h:194
void Stz(uint32_t low, uint32_t high)
void ClearBreakpoints()
Definition cpu.h:731
bool GetBreakFlag() const
Definition cpu.h:130
bool GetDecimalFlag() const
Definition cpu.h:131
uint16_t AbsoluteIndirect()
void Cmp(uint32_t low, uint32_t high)
uint8_t PopByte()
Definition cpu.h:199
std::vector< uint32_t > breakpoints_
Definition cpu.h:47
uint32_t AbsoluteIndexedX()
void BIT(uint16_t address)
uint16_t ReadOpcodeWord(bool int_check=false)
Definition cpu.h:140
void BPL(int8_t offset)
uint8_t E
Definition cpu.h:72
uint16_t StackRelative()
void Ror(uint32_t low, uint32_t high)
bool GetOverflowFlag() const
Definition cpu.h:129
void SetNegativeFlag(bool set)
Definition cpu.h:119
void SetBreakFlag(bool set)
Definition cpu.h:121
bool int_wanted_
Definition cpu.h:781
uint32_t StackRelativeIndirectIndexedY()
void JMP(uint16_t address)
void Sty(uint32_t low, uint32_t high)
bool nmi_wanted_
Definition cpu.h:779
void LDX(uint16_t address, bool immediate=false)
void JSL(uint16_t address)
void Lsr(uint32_t low, uint32_t high)
uint32_t AdrDpx(uint32_t *low)
Definition addressing.cc:28
void compare(uint16_t register_value, uint16_t memory_value)
Definition cpu.h:746
void SetIndexSize(bool set)
Definition cpu.h:116
uint32_t AbsoluteIndirectLong()
void Adc(uint32_t low, uint32_t high)
void LDA(uint16_t address, bool immediate=false, bool direct_page=false, bool data_bank=false)
void WriteLong(uint32_t address, uint32_t value)
Definition cpu.h:178
void LDY(uint16_t address, bool immediate=false)
bool xf()
Definition cpu.h:112
InstructionEntry(uint32_t addr, uint8_t op, const std::string &ops, const std::string &instr)
Definition cpu.h:16
std::string instruction
Definition cpu.h:29
uint32_t GetAddress() const
Definition cpu.h:21
const std::string & GetInstruction() const
Definition cpu.h:24
uint8_t GetOpcode() const
Definition cpu.h:22
const std::string & GetOperands() const
Definition cpu.h:23
std::string operands
Definition cpu.h:28
Memory interface.
Definition memory.h:64
SNES Emulation and debugging tools.
Definition apu.cc:13
Main namespace for the application.
Definition controller.cc:18